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FPC / PCB 工程計算機
PCB 阻抗預估計算器:Microstrip、Stripline 與差分對
依 Dk、介質高度、線寬、銅厚與差分間距,初步估算 PCB / FPC 單端與差分阻抗。
阻抗預估計算器怎麼用
阻抗預估適合在設計初期抓線寬、介質厚度與 Dk 的方向。正式 controlled impedance 應交由 field solver、工廠疊構與 impedance coupon 驗證。
This PCB impedance calculator gives an early routing estimate for line width, dielectric height and Dk. Production controlled impedance should be validated with a field solver and test coupon.
Simplified microstrip / stripline estimate
公式: Z0 is estimated from dielectric constant, dielectric height, trace width and copper thickness
Dk: dielectric constant of the material system. H: dielectric height between trace and reference plane. W: trace width. T: copper thickness correction.
公式依據 Formula basis: simplified transmission-line approximations for early microstrip and stripline planning. Reference: IPC lists IPC-2141 for controlled impedance circuit boards and high-speed logic design guidance. https://www.ipc.org/ipc-design-standards Engineering note: final controlled impedance should be validated by a field solver, factory stack-up and impedance coupon measurement.
範例
With Dk 3.4, 0.05 mm dielectric height, 0.1 mm width and 0.5 oz copper, the tool gives an early single-ended impedance estimate.
輸入欄位 Structure type Dk Dielectric height Trace width Copper thickness Pair spacing
結果輸出 Single-ended impedance estimate Differential impedance estimate
工程注意事項 FPC materials often have different Dk and adhesive effects from rigid FR-4 boards. Copper roughness, solder mask, coverlay and adhesive can shift actual impedance. Use this planner to narrow the starting point before factory simulation.
驗證檢查 Controlled impedance target Layer reference plane Differential pair spacing Coupon validation
相關製程站
疊構設計 - Total thickness, dielectric spacing, symmetry, controlled impedance 線路設計 - Trace width, spacing, bend-zone routing, differential pair spacing 電測 - Open / short, resistance, voltage drop, impedance coupon
相關計算器
線寬電流計算器 - 依銅厚、溫升與內外層估算線寬及載流能力。電壓間距估算器 - 用自訂設計規則估算 conductor spacing,適合作為 clearance / creepage 初步檢查。線路電阻壓降計算器 - 依線長、線寬、銅厚、電流與溫度估算電阻、壓降與功耗。
FAQ
Why is this called a planner? Because simplified equations are useful for direction, not final release data. Production impedance needs a validated stack-up and field solver.
Can coverlay affect impedance? Yes. Coverlay and adhesive can alter the effective dielectric environment, especially for FPC microstrip structures.